A Double Threshold Speech Endpoint Detection Algorithm Implementation in ASIC

A kind of speech endpoint detection ASIC circuit is designed, which is based on double threshold detection algorithm of short-term magnitude and zero-crossing rate.We can greatly save the cost of hardware resourcesby usingdynamic frame partition technology based on asynchronous FIFO and CSD coding technology.We have completed the verification using the collected speech signal in Modelsim and FPGA platform respectively. The results show that this algorithm has the advantages of simple hardware implementation, low resource consumption and high detection accuracy.