CHEN Xiao, WEI Ting-cun, LIU Wei. The System-level Design and Simulation of Digital Self-calibrating 12-bit SAR-ADC[J]. Microelectronics & Computer, 2014, 31(7): 73-76,83.
Citation: CHEN Xiao, WEI Ting-cun, LIU Wei. The System-level Design and Simulation of Digital Self-calibrating 12-bit SAR-ADC[J]. Microelectronics & Computer, 2014, 31(7): 73-76,83.

The System-level Design and Simulation of Digital Self-calibrating 12-bit SAR-ADC

  • Successive-Approximation-Register Analog-to-Digital Converter (SAR ADC) has the characteristics of low power consumption and small area.In this paper,for the 12-bit SAR-ADC,the output voltage errors of the built-in C-R DAC are analyzed,and the corresponding calibration algorithm is proposed to improve the precision of the SARADC.Based on the circuit structure of 12-bit SAR-ADC and the calibration algorithm,the MATLAB/Simulink system-level model is established.The simulation results show that,the static and dynamic properties of SAR-ADC are significantly improved,the DNL and INL are decreased about 1LSB and 2LSB,respectively,and the ENOB is increased about 1bit.
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