A FPGA Realization of CORDIC Based High Speed Variable Point FFT

Present a FPGA realization of high performance FFT used in star-carried synthetic aperture radar real-time data processing system.The Coordinate Rotational Digital Computer (CORDIC) algorithm is adopted to realize complex multiplication, reducing the system complexity and saving hardware resource.A new convenient twiddle factor generator is proposed and don't need extra ROM resources.The block floating point data type effectively solves the overflow in long point FFT.The point can be varied from 64 to 32K and the real and imaginary parts of data are 16 bits.The whole design uses 16-point parallel pipeline structure.A 16-access parallel conflict free address generation is proposed.The highest clock frequency is 118.89MHz.The processor can compute a 1024-point FFT with 4.48μs, satisfies the requirement of high speed, real-time operation.