WANG Jin, TIAN Ze, TANG Long-fei. Design of a Transceriver With ADC for 100BaseTX Ethernet[J]. Microelectronics & Computer, 2016, 33(8): 126-129.
Citation: WANG Jin, TIAN Ze, TANG Long-fei. Design of a Transceriver With ADC for 100BaseTX Ethernet[J]. Microelectronics & Computer, 2016, 33(8): 126-129.

Design of a Transceriver With ADC for 100BaseTX Ethernet

  • This paper describes a 100BaseTX Ethernet physical layer interface with ADC in 1.2 V 0.13 μm CMOS technology. A continuous-time linear equalizer (CTLE) and a decision-feedback equalizer (DFE) are used in receiver. The circuit uses digital techniques to perform adaptive line equalization and baseline wander compensation through analog-to-digital convertor. The proposed CTLE and variable-gain amplifier (VGA) mixed structure shareing resistor and capacitance, can decrease low power and small area. The transceiver allows for robust performance for cable lengths>100 m.
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