Implementation of Pipeline Structure of SM3 Algorithm on FPGA

CAI Bing-qing, BAI guo-qiang. Implementation of Pipeline Structure of SM3 Algorithm on FPGA[J]. Microelectronics & Computer, 2015, 32(1): 15-18.

Citation:

CAI Bing-qing, BAI guo-qiang. Implementation of Pipeline Structure of SM3 Algorithm on FPGA[J]. Microelectronics & Computer, 2015, 32(1): 15-18.

Citation:

CAI Bing-qing, BAI guo-qiang. Implementation of Pipeline Structure of SM3 Algorithm on FPGA[J]. Microelectronics & Computer, 2015, 32(1): 15-18.

Abstract

In this paper, we mainly introduce a hardware implementation based on pipeline structure method with a good performance. We improved the speed of per SM3, and the performance on FPGAs of Altera is about 49.6 to 66.5 times faster than other's implementation of SM3.

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