A Low Power Methodology Implemetation Based on the PE Module of Motion Estimation Algorithm

According to the hardware structure of the PE module of Motion Estimation circuits,we firstly present the algorithm named Clustered Voltage Scaling(CVS)which is used for assigning the voltage supply to gates in integrated circuits having dual power supplies.Comparing to the original circuit with the single power supply,it provides up to 45.3% power reduction.On the basis of the dual VDD circuit,we gate the clock and it shows up to 63.2%power savings.Furthermore, we present a new level conversion to obtain less power and delay for the circuits having multi-power supplies.