ZHOU Qi, XUAN Xue-lei, HE Guang-hui. Design and verification of PCIE interface for FPGA[J]. Microelectronics & Computer, 2019, 36(7): 17-21.
Citation: ZHOU Qi, XUAN Xue-lei, HE Guang-hui. Design and verification of PCIE interface for FPGA[J]. Microelectronics & Computer, 2019, 36(7): 17-21.

Design and verification of PCIE interface for FPGA

  • According to the PCIe protocol, the basic structure of the PCIe bus is introduced. On this basis, a PCIE interface that can be applied to the FPGA is designed, and the interface conversion is completed according to the actual user requirements. At the same time, the programmability design is convenient for the user to quickly configure the interface, and the functions applied to the FPGA are introduced. Code specification. Finally, based on the UVM build verification platform, the PCIE verification is completed, and finally the PCIe interface is applied to the FPGA.
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