Design of FPGA-based Feature Points Selection IP Core for KLT
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Abstract
To solve the disadvantage of traditional feature points selecting method such as calculation time-consuming and poor universal,a universal parallelized method for selecting feature points is proposed and its IP core for FPGA is designed.The result of experiment demonstrates this IP core achieve a good real-time performance with fewer resources consumption,and has good versatility,which can meet the needs of applications.
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