Circuit design of wide supply voltage input and multi-channel oscillator

This paper introduces a design of multi-channel relaxation oscillator circuit using BCD process wide power supply voltage input. An on-chip power conversion circuit and a clock generation circuit based on a relaxation oscillator are proposed to overcome the requirement of a low-voltage oscillator under a wide power supply range, and reduce the frequency-to-voltage sensitivity while reducing the complexity of the voltage conversion circuit. This circuit can be applied to a single power supply chip for a wide range of voltage changes. When the power supply voltage VDDH is a typical value of 24 V, the logic low level VDDL temperature coefficient is 290 ppm / ℃; when the power supply voltage changes from 0 to 24 V, VDDL is stable at 5 V and needs only 0.16 μs. At 27 ℃, the VDDL level changes by 1.72% when the power supply voltage VDDH changes from 7 V to 40 V. At 27℃, the maximum clock offset is 0.20% at 7 V supply voltage and 0.21% at 24 V supply voltage.The circuit is implemented in CSMC 0.25 μm process. When the power supply voltage is 24 V and the operating frequency is 25 MHz, current consumption is only 150 μA.