YU Zhi-guo, WEI Jing-he. Design of HW/SW Co-verification for a SoC Based on JTAG[J]. Microelectronics & Computer, 2010, 27(10): 160-162.
Citation: YU Zhi-guo, WEI Jing-he. Design of HW/SW Co-verification for a SoC Based on JTAG[J]. Microelectronics & Computer, 2010, 27(10): 160-162.

Design of HW/SW Co-verification for a SoC Based on JTAG

  • A SoC co-verification platform based on JTAG port is presented.The hardware of platform is based on FPGA and debug software is developed on the platform.The software has some functions such as SRAM access test, CF card access test, serial port test, program download, program reset and etc.SRAM read IP module and μClinux operating system has been tested in this platform.The result indicates that the platform is beneficial to the design and the debugging of SoC.
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