Research on Linear Feedback Shift Register United Architecture for Parallel and Reconfigurable Processing

The parallel and reconfigurable united architecture of LFSR is represented to improve the speed, flexibility and security of communication system and cipher algorithms. It can be reconfigured to Fibonacci LFSRs and Galois LFSRs according to different applications. The random lengths and feedback taps can be achieved to meet the demands of different applications. The parallel updating method has an obvious advantage on speed and efficiency. Furthermore, the flexibility and complexity increases the security of the communication system and cipher algorithms. Compared with design in Ref6, the area decreases 47.4% and the delay time shortens 11.5%.