Research on High Efficiency Organization Model of Instruction Memory in Embedded VLIW Processor

In order to solve the problem of high power consumption and low energy efficiency in the current embedded instruction RAM designs, this paper researches the conventional implementation of embedded instruction RAMS, and analyzes power and efficiency variation with memory capacity. Based on the technique of clock gating and block-dividing management, the high efficiency organization model is put forward, and the management method in a matrix layout is implemented. Compared with traditional embedded instruction RAMs, its power is reduced by 74.93% and energy efficiency increased by 3.99 times.