Design of Elastic Buffer in Physical Coding Sublayer Based on PCIe 2.0

Elastic buffer can compensate the clock deviation to solve the problem of data transmission under different clock domains, so it is widely used in high speed communication system. Based on PCIe 2.0 protocol, this paper designs an Elastic buffer with normal half-full method. Comparing with the traditional method to synchronize the pointer, it checks the reading pointer when the writing pointer is on the half position in elastic buffer. Thus, it simplified the logical structure. In addition, it not only compensate the clock deviation, but also connect with interfaces of other module compatibly at the receiver of PCS. After verifying on modelsim, the writing and reading clock can achieve 250 MHz, the width of input and output data is 20 bit. So it can support two modes, 5 GT/s(full-rate) and 2.5 GT/s(half-rate).