Design of a Capacitor-less LDO with Improved Transient Response

This paper presents a capacitor-less LDO with improved transient response based on an adaptive biasing amplifier. The amplifier can adapta its bias aurent to be able to provide large output current to enhance the slew-rate when the load transient response occurs. By reduce the charging or discharging current of load capacitor, the transient response enhance circuit can decrease the built-up time of the output voltage. The proposed circuit has good loop stability with parallel feedback compensation. The results of simulation show that maximum of the output current is 200mA, minimum of the dropout voltage is 200 mV, the quiescent current is only 16 μA, the response time of a load current variation from 1 mA to 200 mA is 2.5 μs and the response time of a load current variation from 200 mA to 1 mA is 3.5 μs.