WANG Yu-fei, ZOU Xiao-dong. Research and Implementation of MTM BUS Monitoring System Based on FPGA[J]. Microelectronics & Computer, 2017, 34(3): 61-64, 69.
Citation: WANG Yu-fei, ZOU Xiao-dong. Research and Implementation of MTM BUS Monitoring System Based on FPGA[J]. Microelectronics & Computer, 2017, 34(3): 61-64, 69.

Research and Implementation of MTM BUS Monitoring System Based on FPGA

  • IEEE P1149.5 standard test and maintenance bus, also known as MTM bus, is a standard of testing bus designed for the electronic system of circuit boards and has important significance for improving the reliability and maintainability of the system. This system uses FPGA to implement MTM bus controller and the PC interface module and uses 32-bit high-performance soft core processor Nios Ⅱ as the core of interface module and communicates with the PC via W5300 chip. This system samples the singals by online debugging tool called identify. System-level testing shows that all of the system functions can be executed correctly.
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