XIE Chang-sheng, YU Zong-guang, ZHANG Yan-fei, WANG De-long, HU Kai. Methods for Measuring Clock Skew on FPGA Devices[J]. Microelectronics & Computer, 2017, 34(6): 137-140.
Citation: XIE Chang-sheng, YU Zong-guang, ZHANG Yan-fei, WANG De-long, HU Kai. Methods for Measuring Clock Skew on FPGA Devices[J]. Microelectronics & Computer, 2017, 34(6): 137-140.

Methods for Measuring Clock Skew on FPGA Devices

  • During FPGA is becoming larger and clock frequency higher, the clock skew is key factor during design implemented, so it's more important to get the clock skew parameter of FPGA clock system when FPGA device design. In the paper, based on JFPGA-YX2 device, introduce methods to measure accurately skew of clock distribution networks on FPGA, it use ring oscillators formed on the device using clock tree and configurable logic, then measure the frequency of the ring oscillator, last calculate and get the clock propagation delay and clock skew.
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