ZHOU Shan, WANG Jin-bo, WANG Xiao-dan. Research of FPGA Timing Sequence Analysis Technology Based on Timing Sequence Path[J]. Microelectronics & Computer, 2016, 33(1): 76-80.
Citation: ZHOU Shan, WANG Jin-bo, WANG Xiao-dan. Research of FPGA Timing Sequence Analysis Technology Based on Timing Sequence Path[J]. Microelectronics & Computer, 2016, 33(1): 76-80.

Research of FPGA Timing Sequence Analysis Technology Based on Timing Sequence Path

  • For the significance of high reliable FPGA test timing sequence analysis technology on Spaceflight, depending on the FPGA design and test experience for several years, timing sequence analysis technology is analyzed deeply, and a set of feasible solution is extracted, and the analysis target of timing sequence analysis is clarified. The interface signal timing sequence calculation rules of timing sequence analysis and analysis rules of timing sequence test results are presented by the main method of timing sequence analysis technology; this set of technology is applied successfully on the tests of several high reliable software on Spaceflight, many significant functional disabled problems, caused by timing sequence problems, can be found, and the common timing sequence problems are classified and summarized.
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