A Buffer Layer Design in Serial RapidIO

RapidIO is an emerging high-performance interconnect technology for embedded system interconnection. As a very significant part of serial RapidIO, buffer layer helps to guarantee reliable packet delivery and plays an important role in link level flow control. In this paper, the design of an improved buffer layer in serial RapidIO endpoint is described in detail. Both transmitter-controlled flow control and receiver-controlled flow control are supported in this design. Simulation results show that the proposed buffer layer has better space utilization and higher transmission efficiency, compared with the referenced designs. It is valuable for high performance embedded system applications to some extent.