A 10 bit 40 KS/s low-power SAR ADC for bio-electrical signal acquisition

A 10 bit, 40 KS/s low-power successive approximation register analog-to-digital converter (SAR ADC) is designed for bio-electrical signal acquisition. To reduce the switching power of capacitors, a new hybrid switching scheme is proposed. Based on the monotonic switching method and the V_cm-based switching method, this proposed switching scheme can achieve low-power switching of capacitors effectively. Compared with the conventional V_cm-constant switching scheme, the hybrid switching method can reduce the switching energy by 90.7%. Compared with the monotonic switching method and the V_cm-based switching method, this new proposed method can reduce the switching energy by 50.2% and 25.3%, respectively.Implemented in TSMC 0.18μm CMOS process, the post-simulation results show that the hybrid ADC achieves the effective number of bits (ENOB) of 9.6 bit, the spurious free dynamic range (SFDR) of 73.2 dB and the Figure of Merit (FoM)of 68 fJ/(Conv-step) at 40 KS/s sampling rate with full-scalenear Nyquist input, with power consumption of 2.1 μW.