The High-Throughput ASIC Implementation of SHA-1 Algorithm

SHA-1 algorithm is one of the national standard for Secure Hash Algorithm. For the sake of accelerating the throughput of SHA-1 algorithm, a new 5-in-1 structure is proposed in this paper. This structure reduces the compression function from original 80 rounds to 16 5-in-1 rounds and in each round some functions f and adders can be moved out of the critical path. Based on this, we can shorten the critical path and increase the throughput. In SMIC 65nm technology, the throughput of SHA-1 can achieve 12.68 Gb/s, which is higher than that of other reported designs and can meet the requirement of high throughput. This design also supports resuming transfer.