PEI Xi-jie, TIAN Ze, ZHENG Xi-jian, ZHANG Jun, XU Hong-jie, LIU Ning-ning. Design and implementation of a pipeline primitives assembly circuit[J]. Microelectronics & Computer, 2019, 36(8): 10-13, 18.
Citation: PEI Xi-jie, TIAN Ze, ZHENG Xi-jian, ZHANG Jun, XU Hong-jie, LIU Ning-ning. Design and implementation of a pipeline primitives assembly circuit[J]. Microelectronics & Computer, 2019, 36(8): 10-13, 18.

Design and implementation of a pipeline primitives assembly circuit

  • Primitives is a basic unit for graphic processing. To improve the performance for GPUs a primitive assembling circuit is presented. The circuit has a simple structure, pipelining and can convert all primitivesdefined by OpenGL to separate point, line or triangle. The circuit can reduce the complexity of the flowing unit task and improve the performance of drawing. The verification of the circuit is completed by module level simulation verification and FPGA prototype verification, the results show that the design is function and the frequency can reach 400MHz and the peak value of triangle assembly can reach 380M/s.
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