An Architecture Design for Multiple Datasets Accumulation

This paper propose anNICA(Node Injected Current Accumulation) module consists of FIFO, adder with control logic and memory. We solve the problem of large blocking, complex control logic, hybrid accumulation. On this basis, with the method of batching, we reduce the delay, finally save the hardware resources. Using a Xilinx Virtex-7 FPGA as the target device, we implement our designs and present good performance.