An All-digital Phase Lock Loop Based on Bang-bang PFD

A king of all-digital phase lock loop based on bang-bang PFD is proposed in this paper.The ADPLL based on bang-bang PFD is composed of bang-bang PFD, digital filter with binary search and automatic gain controlled, and ladder-shaped ring digital controlled oscillator with three level control word.Simulation and verification are done about the DCO based on 0.18μm CMOS process.The results show that the ADPLL output frequency range from 80 MHz to 220 MHz, finish the frequency locked in 80 cycles, phase locked in 500 cycles, the measured peak to peak jitter is about 22.55 ps, RMS jitter is 3.342 ps.The ADPLL consumed a power of 2.03mW@ 125 MHz.