Low Power ∑△ Modulator for Wireless Sensor Network SOC

A single-loop third-order single-quantizer Sigma-Delta modulator for wireless sensor network SOC was presented,which used a newly feedforward topology with less demand for operational amplifiers.For reducing the power consumption,a newly two -stage CLASS A/AB OPA was adopted and the OPAs of the second and third stage were scaled.The modulator was implemented in Huahong 0.18μm CMOS process,and the input signal bandwidth was 8 kHz at oversampling rate (OSR) of 128.The results show that the modulator can achieve a SNR of 96 dB with a 5 kHz input and a 2.048 M Hz sampling clock.The whole modulator dissipates only 180 μW under 1.8V supply voltage,the total area of the chip core is 0.51 mm².