Tag Encoding Based Low Power Instruction Cache
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Abstract
Instruction cache dissipates a large amount of energy in embedded processor.This paper proposes a low power design method for instruction cache based on tag encoding.Adding a tag buffer with small size to store the tag bits of instruction fetch address, and replacing the tag store with large bit wide in the traditional instruction cache with the tag encoding store with little bit wide to store the encoding data of the tag buffer line.This method can reduce the instruction cache area, thus saving the instruction cache power consumption.Experimental results show that this method could save 11.76% of instruction cache power consumption and reduce 10.04% of instruction cache area, in comparison with the traditional instruction cache.
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