Design of 3780 Point FFT Processor for DTMB Receiver

Present a design of FFT processor for DTMB receiver.This processor is based on mixed radix algorithm, prime factor algorithm and WFTA.Dynamic scaling algorithm is also employed to achieve high precision and to reduce the power and area.The verification of FPGA shows that SNR of the processor is 60.4 dB and the max frequency is 84.48 MHz when both of the data width of input and output is 13 bits, which has meet the requirement of precision and frequency of DTMB receiver respectively.