An Application Design Fault of Antifuse FPGA

Due to the particularity of the architecture and implementation principle of the antifuse FPGA, there is a kind of sequential logic fault which is prone to occur, unstable in the fault phenomenon and has a certain concealment when the application design is implemented in the antifuse FPGA. Through in-depth analysis of the fault phenomenon, causes and principles, it is found that the application design fault is related to the drive capability (Fanout limit) of the antifuse FPGA. Aiming at the fault characteristics, a set of solutions to eradicate the fault factors are proposed. The experimental results show that the solutions can effectively eliminate the application design fault.