Framework Design of Automatic Simulation Testing Environment for FPGA Board Level Test

There are many problems in the current process of FPGA testing, such as high cost of implementation, limited sufficiency of testing, and poor reliability of result. An automatic, real-time, non intrusive and closed loop simulation test environment is presented. In the design of the environment, it maps the target FPGA environment to the board level simulation test environment through the physical interface technology, the dynamic data technology and the external device simulation technology. The framework of the environment, the task structure and physical structure for the test environment is defined, the working process based on the generation and consumption of test data is designed. Finally, a preliminary prototype based on the framework is designed, which achieves good results in a test project.