Design of a Self-biased High Efficiency CMOS UHF Recifier Circuit

A kind of ultra high frequency rectifier circuit with low cost,high efficiency is designed and realized based on the SMIC 0.18 μm 1P6M standard CMOS process in this paper,This design uses the dc bias circuit and drive circuit to compensate the threshold voltage of the rectifier,and eliminates the adverse effects of the standard CMOS technology threshold voltage on the rectifier circuit efficiency.With the post-layout simulation,when the input 915 M Hz,340 mV radio frequency signal,the rectifier circuit output voltage is 2.646 V,the start time is 60 μs,the overall efficiency is as high as 43.8%,the whole circuit layout area is 910 μm × 600 μm.