A Readout Circuit for Graphene Hall Element

In order to realize the high resolution detection of grapheme hall element,amplifier and analog-to-digital technique is adopted to design a analog front-end readout circuit.The circuit consists of amplifier,low dropout regulator (LDO),Schmitt trigger and 10 bit/1 MHz Successive Approximation Analog-to-Digital Converter (SAR ADC).The readout is implemented in SMIC 0.18 μm 1P6M CMOS process.The post-simulation results show that in 3.3 V power supply,50 kHz input frequency and 1 M Hz clock frequency,the SFDR is 71.294 dB,SNDR is 59.538 dB,ENOB is 9.59 bit,detection accuracy is 0.00013 T,meets the detection requirement of grapheme hall element.