Rad-Hard Standard Cell Library Design Based on Commercial Process

Enclosed-gate layout can eliminate current leakage caused by TID in a NOMSFET. Guard ring can alleviate SEL and eliminate field current leakage through two active areas with different potentials. DICE can weaken SEU in sequential cells. The three methods above can help us achieve the purpose of compatibility with commercial process and best rad-hard effect. A small, mixed-height and high density standard cell library is designed based on 0. 18 μm CMOS logic process using the three methods above. Validation of the library is implemented with Digital IC tools and the coming results get well.