Design of 32-channel and High-resolution TDC Circuit
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Abstract
A 32-channel and high-resolution Wave Union time-to-digital converter (TDC) implemented in FPGA is presented.Utilizing time delay in carry chain of adders,leading edge of input hit launches a “wave union” into the carry chain-register array structure,in which multiple measurements are made to effectively subdivide the ultra-wide bins and improve measurement resolution.Timing simulation and hardware testing results show that the TDC circuit basically fulfills the design requirements.
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