An Optimized Image Scaling Based on Superposition and Its FPGA Implemention
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Abstract
Aiming at solving the problem of hardware resource consumpution in the feild of image scaling, the hardware design of the image scaling is carried out by using the method of coordinate transformation and superposition.Besides we can make it easy to implement on FPGA in the form of two interger times scaled images overlaying, with the pipeline architecture design.Finally the algorithm is verified on the Xilinx XC7A200T chip and the data is transfromed to images with MATLAB which confirms at can work well.
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