14 Bits 200MSPS Digital Self-Calibration Current-Steering D/A Converter

In this paper it adopted a novel a digital calibration algorithm, and it selects the current sources with random ways which keeps to the principles of random selection direction and full random selection on the situation of special code through calculating and storing the starting and finishing point, by this way it can whiten the mismatch noise and improve dynamic performance of DAC. Based on SMIC18 1P6M technology, a 14 bits 200MSPS digital self-calibration current-Steering DAC is implemented and its post simulation results show the SFDR is improved from 88.3 dB to 92.3 dB with calibration but the area of this chip is similar to the non-calibration one.