ZHAO Xu-ying, LI Huan, WANG Xiao-qin, WANG Dong-lin. Sliding Window Pipelined High Performance Reconfigurable Viterbi Decoder[J]. Microelectronics & Computer, 2018, 35(2): 32-36.
Citation: ZHAO Xu-ying, LI Huan, WANG Xiao-qin, WANG Dong-lin. Sliding Window Pipelined High Performance Reconfigurable Viterbi Decoder[J]. Microelectronics & Computer, 2018, 35(2): 32-36.

Sliding Window Pipelined High Performance Reconfigurable Viterbi Decoder

  • In order to support multi-standard for convolutional coding in wireless communication, and to meet the requirement of high data rate in the future. A radix-4 multi-standard high performance reconfigurable viterbi decoder based on the sliding window pipeline technique with forward traceback algorithm was implemented. The peak throughput of the decoder can reach up to 1.15Gbps@6144bit, 600MHz. Compared with the mainstream commercial viterbi decoder, the data processing speed of VCP2 which is proposed by Texas Instruments company is 9.5Mbps@40bit, 333MHz, and the data processing speed of viterbi decoder in this paper is 32.173Mbps@40bit, 333MHz, performance improved about 3.3 times. In addition, the decoder is superior to other reconfigurable viterbi decoders in area and power consumption. It has great application prospect in the future high data rate convolutional decoding.
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