A 9 bit 8 Gs/s Very High Speed Track and Hold Amplifier Design

A new design of 9 bit 8 Gs/s very high speed track-and-hold amplifier (THA) is presented.Differential architecture is used in the design,and the compensation of hold mode feedthrough and nonlinearity is realized through diode-connected transistor and capacitor.The total harmonic distortion is reduced and resolution is enhanced.Based on 0.18μm SiGe BiCMOS process,simulations show that THD of the THA is-58.6 dB,resolution is 9.4 bit,track mode bandwidth is 4.6 GHz,and power consumption is 65 mW.