A System Design Methodology for High Reliable SoC

In this paper, the reliability problem of the SoC is analyzed in system level. In order to implement the high reliable SoC in system level, a SoC system is designed which includes VCI bus, PowerPC processor, DMA controller, SRAM and DRAM interfaces. As for the high reliable SoC, this paper proposed a high reliable storage mechanism based on a TMR and ECC hybrid structure. An image processing program is design to simulate the reliability of the SoC system in system level. The simulation result shows that the proposed high reliable structure can improve the reliability of the SoC system.