Hardware Acceleration Technology of Matrix Multiplier Based on Systolic Array

In KALMAN filtering algorithm, a mass of matrix multiply operation exist. Considering various hardware acceleration technology, based on systolic array, a kind of floating matrix multiplier, with parallel architecture, in order to guarantee the real-time performance, is designed. Nine self-designed PE are integrated in the multiplier, the peak performance of which can reach 761.96 MFLOPS. In the company of Block Matrix Multiplication, the multiplier could be extended well and play a role in higher dimension matrix multiply operation.