Design of an adaptive reconfigurable general-purpose floating-point accelerator

Application-specific accelerators often lack flexibility due to their professionalism, which inevitably leads to the decrease ofenergy efficiency during the execution of a wide range of applications. In this paper, an adaptive reconfigurable floating-point accelerator is designed, which can automatically map computing tasks to reconfigurable computing resources at runtime basing on computing task requirements and the status of reconfigurable computing resources. The floating-point accelerator uses the architecture of "RISC-V + Reconfigurable Floating-point Arithmetic Unit". The reconfigurable floating-point arithmetic unit consists of a series of coarse-grained floating-point arithmetic units, which are responsible for specific floating-point calculations.The design has been prototypical verified on the Xilinx Ultrascale XCVU440 FPGA chip, and the results show that the floating-point accelerator has wider applicability, high operation efficiency, and high algorithm adaptability.