Verification of Floating Point Facilities Based on UVM

A test-bench was designed and implemented on the basis of UVM to verify all facilities of the floating-point unit. The test-bench integrates an efficient mechanism to generate floating-point operands and expands the corner of traditional cases with the method of convert floating point numbers to continued fractions. It calls a C model to achieve automatic results comparison, in addition to FCC technique, the coverage was converged quickly. Experimental results show that the test-bench can effectively verify all facilities of the floating-point unit and greatly reduce the time, moreover, the floating-point generator can be used for other floating-point verification.