Design of Binocular Real-Time Distance Measurement Algorithm Based on FPGA

In order to overcome the shortcomings of poor real-time performance of the binocular distance measurement algorithm on the software level, we present a high-speed hardware architecture of binocular distance measurement algorithm based on FPGA, the architecture uses a parallel pipeline structure to detect and describe interest points, and description vectors caching and processing is achieved by the ping-pong operation, disparity search and distance measurement are realized by WTA (Winner takes All) circuit and triangulation method simultaneously. The experimental results show that it only takes 12.5ms to deal with a pair of 640×480 images at the clock frequency of 25 MHz, and the processing speed is about 68 times of the software, it meets the real-time needs of some high-speed scenes. Simultaneously, the processing speed and resource consumption are also better than some related hardware implementations.