The Design of High Performance Viterbi Decoder Based on FPGA

Convolutional code and its Viterbi decoding algorithm had been widely applied to various fields of communication and signal processing. This paper presents the decoding scheme of (2, 1, 7) convolutional code. In order to take both speed and size into account, the decoder combines parallel structure with serial structure. The core part of the decoder, Add-Compare-Select Unit, has been improved greatly, and the whole decoder has the advantages of performance and resource expense than traditional Viterbi decoder.