LUO Jiang, HE Jin, WU Huan-cheng, WANG Hao, CHANG Sheng, HUANG Qi-jun, XIONG Yong-zhong. Design of a 43 GHz VCO with Low Power Dissipation and Low Phase Noise[J]. Microelectronics & Computer, 2015, 32(7): 161-164. DOI: 10.19304/j.cnki.issn1000-7180.2015.07.037
Citation: LUO Jiang, HE Jin, WU Huan-cheng, WANG Hao, CHANG Sheng, HUANG Qi-jun, XIONG Yong-zhong. Design of a 43 GHz VCO with Low Power Dissipation and Low Phase Noise[J]. Microelectronics & Computer, 2015, 32(7): 161-164. DOI: 10.19304/j.cnki.issn1000-7180.2015.07.037

Design of a 43 GHz VCO with Low Power Dissipation and Low Phase Noise

  • A 43 GHz voltage-controlled oscillator (VCO) with low power consumption and low phase noise has been designed in 0.13-μm CMOS technology. The dc power consumption of the VCO core is reduced and the phase noise is also improved by removing the tail current source and modifying bias circuit. A modified LC-tank is proposed to suppress the second harmonic noise to further improve the phase noise. The simulated tuning range of the proposed VCO is 41.36~44.56 GHz when the tuning voltage changes from 0 to 1.2 V. At a 1.2 V supply, the total dc power dissipation of the VCO core is only 4.8 mW. At the center frequency of 43 GHz, the simulated phase noises at 1 and 10 MHz offset frequencies are respectively -97.5 dBc/Hz and -119.5 dBc/Hz and the simulated output power is -5 dBm with a 50 Ω load.
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