GUO J W,YIN W T,TAN L Y,et al. A review of EDA tool development for Chiplet heterogeneous integrated microsystems[J]. Microelectronics & Computer,2023,40(11):53-60. doi: 10.19304/J.ISSN1000-7180.2023.0703
Citation: GUO J W,YIN W T,TAN L Y,et al. A review of EDA tool development for Chiplet heterogeneous integrated microsystems[J]. Microelectronics & Computer,2023,40(11):53-60. doi: 10.19304/J.ISSN1000-7180.2023.0703

A review of EDA tool development for Chiplet heterogeneous integrated microsystems

  • Chiplet heterogeneous integrated microsystems are a significant technological trend in the post Moore era. With the continuous development of Chiplet technology, the number of Chiplets is increasing, the integration degree of 3D visualization is becoming higher, and the area of Chiplets solutions is also increasing. At present, the supporting role of electronic design automation(EDA) tools in various stages of the Chiplets design process is still relatively limited. By analyzing the defects and deficiencies of the existing Chiplets design process in system planning, single-chip design, substrate design, microsystem integration analysis and verification, and the current application status of domestic EDA technology in interposer process design kit(PDK) development, Chiplets design layout planning, efficient automatic routing, multi-chip integrated analysis and physical verification, it was pointed out that the current Chiplet design faces pain points such as non-standard physical verification, inefficient routing and lack of integrated analysis covering multiphysics coupling. Faced with more challenges posed by the future development of 3DIC for EDA tools, a chip-packaging collaborative design solution urgently needed in the market has been proposed.
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