Research progress in hybrid bonding technology for advanced packaging applications

As Moore’s Law advances to nanoscale nodes, three-dimensional integration supported by Through Silicon Via(TSV), ReDistribution Layer(RDL), thin chiplet stacking bonding, et al. is considered an important way to continue Moore’s Law. Cu/SiO₂ hybrid bonding can continuously reduce the three-dimensional interconnection pitch between chips and increase the three-dimensional interconnection density. It is a cutting-edge technology in chip stacking bonding. In recent years, it has made breakthroughs in commercial applications such as Complementary Metal Oxide Semiconductor(CMOS) Image Sensor(CIS) , Xtacking 3D NAND, and 2.5D/3D integration, making it a hot topic of research and attention for leading semiconductor research institutions at home and abroad. This article will systematically review the research history and industrial application status of hybrid bonding technology, with a focus on analyzing the technical routes, research methods, and key issues of representative research work at home and abroad in recent years. Based on this, it will prospect the future development direction of hybrid bonding technology.