ZHANG H S,YU L. Tessellation unit design based on adjacent triangles[J]. Microelectronics & Computer,2023,40(10):48-55. doi: 10.19304/J.ISSN1000-7180.2022.0620
Citation: ZHANG H S,YU L. Tessellation unit design based on adjacent triangles[J]. Microelectronics & Computer,2023,40(10):48-55. doi: 10.19304/J.ISSN1000-7180.2022.0620

Tessellation unit design based on adjacent triangles

  • To solve the problem that the number of vertices generated by the Tessellation unit of GPU is too large, we propose a geometric subdivision strategy based on the adjacency relationship of triangles, which is called TSTESS (Triangle Strip on Tessellation). Its main process is to split the subdivision patch into multiple rings from outside to inside, generate multiple trapezoids for each ring, and then generate a large number of continuous triangles for each trapezoid. Based on the winding direction and adjacent information, the finite automata extracts their common vertices to form continuous triangle strips and then output them. TSTESS approach reduces the number of vertices which is conducive to later calculation and storage. Experimental results show that with various subdivision parameters, the number of vertices generated by our method is 50%~65% of that of the traditional method, which can improve the execution efficiency of the Tessellation unit, furthermore, it is easy to use the hardware description codes to integrate into the existing GPU design, so that the triangle strips output by the Tessellation unit could be hardware accelerated.
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