Implementation of a capacitive digital isolator based on OOK modulation

To solve the problems of high current consumption of high speed capacitive digital isolators in "low speed" application, a low static power consumption fully differential digital isolator based on OOK modulation is designed based on TSMC 180nm BCD process. The proposed structure realizes the modulation of the input signal through three sets of switching signals generated in the logic control circuit of the transmitter and carrier signals generated by the oscillator module. When the transmission signal frequency changes, the midpoint potential bias circuit based on the cross-conductor ring structure can stabilize the DC voltage of the differential signal near VDD/2, so as to effectively avoid the error code caused by dc level attenuation at the receiving end. After amplification by a preamplifier, the receiver signal is demodulated by a dual threshold comparator.PVT simulation shows that the maximum transmission rate of 10Mbps can be achieved in the range of 3~5.5V input voltage, and the typical transmission delay is 13ns. The typical transmission delay is 13ns. The typical static power consumption is only 1.3 mA, and the typical dynamic power consumption is 4mA and 4.8mA at 1Mbps and 10Mbps respectively. This design supports multi-channel expansion, which can further reduce the average power consumption of single channel by sharing the internal oscillator and bias module. In addition, the isolator can decode correctly even at the highest 10Mbps input PRBS (Pseudo-random Binary Sequence) code, which proves that this structure has strong transmission robustness.