DU Yanpei, HE Zhanzhuang, LIU Bin, WU Weijun. An evolutionary hardware approach based on reinforcement learning and block parallelism[J]. Microelectronics & Computer, 2022, 39(7): 79-85. DOI: 10.19304/J.ISSN1000-7180.2021.1114
Citation: DU Yanpei, HE Zhanzhuang, LIU Bin, WU Weijun. An evolutionary hardware approach based on reinforcement learning and block parallelism[J]. Microelectronics & Computer, 2022, 39(7): 79-85. DOI: 10.19304/J.ISSN1000-7180.2021.1114

An evolutionary hardware approach based on reinforcement learning and block parallelism

  • Evolvable Hardware (EHW) is a combination of programmable logic devices and evolutionary algorithms, which can dynamically adjust its own circuit structure according to different evolutionary goals.In the evolutionary hardware method, due to its self-evolution characteristics and the parameter sensitivity of the upper genetic algorithm, the adaptability to different evolutionary objects is poor.At the same time, genetic algorithm has the prematurity defect, often cannot evolve to the target truth table in the late stage of large evolutionary target, and the success rate is low.In this paper, an evolutionary hardware method based on reinforcement learning and block parallelism is improved from the traditional evolutionary hardware method, and the evolution is carried out in three stages.In the first stage, RLGA algorithm based on reinforcement learning is used to obtain parameter self-learning ability and improve self-adaptability.The second stage uses the previous stage to learn a certain algebra of parameter evolution.In the third stage, the block parallel evolution method is used to improve the terminal evolution ability and finally improve the success rate of evolution.The results show that the three-stage method can reduce the evolution algebra of the hardware when facing the evolution target of large truth table, and the success rate of evolution can be increased to more than 95%.
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