Implementation of an area optimized low power audio Σ-Δ DAC digital

In order to achieve the micro area target of high-precision audio sigma delta DAC digital front-end, a new method of area optimization of digital front-end circuit is proposed in this paper. Firstly, the system structure of FIR filter is optimized to reduce the hardware cost; secondly, a radix-2^r algorithm is proposed to reduce the filter area by using the shared basic formula among the filter coefficients from structure to coefficient optimization; finally, the optimized 3-order 4-bit sigma delta modulator structure replaces the single bit quantizer to overcome the problem of random jitter and noise At the same time, the relationship between the signal-to-noise ratio of the modulator and the accuracy of the coefficients is analyzed, and a compromise method is adopted to realize the reduced coefficients by shifting, so as to realize the area optimization of the sigma delta modulator with the minimum cost of accuracy. The power consumption is 42 μW, SNR and dynamic range are 122 dB and 120 dB respectively at 1.2 V. The chip area is 0.051 mm² in TSMC 90 nm CMOS process. The results show that the requirement of high performance and low area is realized.