SU Y B,WANG F. Calibrations of offset voltages in dynamic comparators using time-skew[J]. Microelectronics & Computer,2024,41(7):64-73. doi: 10.19304/J.ISSN1000-7180.2023.0515
Citation: SU Y B,WANG F. Calibrations of offset voltages in dynamic comparators using time-skew[J]. Microelectronics & Computer,2024,41(7):64-73. doi: 10.19304/J.ISSN1000-7180.2023.0515

Calibrations of offset voltages in dynamic comparators using time-skew

  • Low offset voltage is a critical design specification of high speed and high resolution comparator. The conventional analysis models and calibration methods for offset voltage are based on the dimensions of voltage, current and load, ignoring the offset voltage introduced by the time domain dimension mismatch of the dynamic comparator. To solve this problem, an unbalanced current charging and discharging theory model is proposed. Compared with the conventional one, the new one is not limited by the DC points, and covered voltage, current, loading and time. Three typical mismatch mechanisms have been analyzed based on this model. Meanwhile, a high energy efficient calibration method using time deviation is proposed based on the analysis of time mismatch mechanism. Compared with traditional voltage compensation or load compensation calibration methods, the traditional calibration methods change the slope of the comparator's charging and discharging curves. The new calibration method changes the start time moment of the comparator's charging and discharging curves. According to the design example based on 65 nm CMOS technology, the accuracy could be improved from less than a few millivolts to less than 0.5 mV compared to traditional methods. The new method doesn't need extra and complex circuits, which is more suitable for the high-speed and high-energy efficient dynamic comparator design.
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